Standard mode, fast mode and fast mode plus I2C-bus and SMBus compatible
Less than1.5ns maximum propagation delay to accommodate standard mode and fast mode I2C-bus devices and multiple controllers
Allows voltage-level translation between:
1.0V Vref(1)and 1.8V,2.5V,3.3Vor 5V Vbias(ref)(2)
1.2V Vref(1)and 1.8V,2.5V,3.3Vor 5V Vbias(ref)(2)
1.8V Vref(1)and 3.3V or 5V Vbias(ref)(2)
2.5V Vref(1)and 5V Vbias(ref)(2)
3.3V Vref(1)and 5V Vbias(ref)(2)
Provides bidirectional voltage-level translation with no controlling pins
Low 3.5ΩON-state resistor is routed between input and output ports and provides less signal distortion
Open-drain I2C bus I/O port (SCL1,SDA1,SCL2and SDA2)
5V tolerant I2C bus I/O port, to allow mixed mode signal operation
High-impedance state of SCL1, SDA1, SCL2 and SDA2EN ports when EN is low-level
Lock-up free operation
Package form: TSSOP8